Academic Profile of Prof. Saheli Sarkhel
Academic Profile of Prof. Saheli Sarkhel
Saheli Sarkhel
Assistant Professor,
Electronics & Communication Engineering Department

ACADEMIC QUALIFICATION:
Ph.D.: PhD (Engg.), Jadavpur University
Post Graduate: M.Tech. in VLSI Design and Microelectronics Technology, Jadavpur University
Under Graduate: B. Tech in Electronics and Communication Engineering, West Bengal University of Technology

TOTAL EXPERIENCE: 8 Years

Official eMail Id: saheli.sarkhel@nsec.ac.in
Professional Experience:
Assistant Professor in the Department of Electronics and Communication Engineering, Netaji Subhash Engineering College since July 2016 till date Senior Research Fellow in the Department of Electronics and Telecommunication Engineering, Jadavpur University from December 2013- June 2016. Senior Research Fellow in the Department of Electronics and Telecommunication Engineering, Jadavpur University from August 2012- December 2013.


Professional Society Membership:
Professional Member of the Electron Device Society of Institute of Electrical and Electronics Engineers (IEEE), USA (Membership #93324153).


Awards & Honors Received:
Gold Medal in M.Tech. in VLSI Design and Microelectronics Technology in the Department of ETCE, Jadavpur University. ; Award from Jawaharlal Nehru Memorial Fund, Govt. Of India, as recognition for excelling in the M.Tech. exam in Jadavpur University.


Association with Outside World:
Advisor of IEEE Electron Devices Society Student Branch Chapter, NSEC. Executive Committee Member, IEEE Electron Devices Society Kolkata Chapter. Invited talks and tutorials co-chair at IEEE International Conference for Convergence in Engineering from 5th to 6th September 2020 organized by Netaji Subhash Engineering College, Kolkata. Organizing Co-Chair at 2nd IEEE International Conference VLSI Devices Circuits and Systems (VLSI DCS 2020) from 21st to 22nd March 2020 organized by IEEE EDS Student Branch Chapter of Meghnad Saha Institute of Technology, Kolkata.


No of Journal Paper Published: 17

No Conference Paper Published: 15

Research Areas:
Modeling and simulation of nano devices, Analog Circuit designing


Journal Reviewer:
Journal of Computational Electronics, Springer ; IET Circuits Devices and Systems


No. of B.Tech/BBA/BCA/B.Sc. Final Year Projects Handled: 10

No. of Innovative Projects Handled: 02

Areas of Innovative Projects Handled:
Low dimensional device modeling, Analog Circuit Designing, IOT


No of Conferences/Invited Talks/Seminars/ Attended: 20

COURSES UNDERTAKEN:
Undergraduate: • Basic Electronics • Solid State Devices • Analog Electronic circuits • Digital Electronic circuits • Digital Signal Processing

Administrative Responsibilities:
Co-convener, Departmental Academic Committee (DAC) Member, Departmental Library Committee Member, Departmental News Magazine Committee Member, Departmental Students Affairs Committee Member, Departmental Research Committee Organizing Committee member of ICCE Conference at NSEC , 2020


Name of Final Year Projects (Currently Handling):
3


Role as a Mentor:
LIST OF MENTEES Roll No. University Roll No. NAME Department Year 31 10900316055 Solanki Somya ECE 4th Yr (pass out batch) 32 10900316056 Soham Majumder ECE 4th Yr (pass out batch) 33 10900316057 Snehangshu Bhattacharya ECE 4th Yr (pass out batch) 35 10900316059 Shreya Seal ECE 4th Yr (pass out batch) 36 10900316060 Shiladitya Saha ECE 4th Yr (pass out batch) 37 10900316061 Shagun Priya ECE 4th Yr (pass out batch) 38 10900316062 Sayan Chowdhury ECE 4th Yr (pass out batch) 39 10900316063 Sayan Bose ECE 4th Yr (pass out batch) 40 10900316064 Satveer Kumar Sahu ECE 4th Yr (pass out batch) 41 10900316065 Saptarshi Jash ECE 4th Yr (pass out batch) 42 10900316066 Sankhadip Das ECE 4th Yr (pass out batch) 43 10900316067 Sania Srivastava ECE 4th Yr (pass out batch) 44 10900316068 Saket Kumar ECE 4th Yr (pass out batch) 45 10900316069 Saikat Mondal ECE 4th Yr (pass out batch) 46 10900316070 Saheb Nanda ECE 4th Yr (pass out batch) 47 10900316071 Sagnik Chakraborty ECE 4th Yr (pass out batch) 48 10900316072 Roni Das ECE 4th Yr (pass out batch) 49 10900316073 Romik Roy ECE 4th Yr (pass out batch) 50 10900316074 Rohit Rambansh Yadav ECE 4th Yr (pass out batch) 51 10900316075 Rishov Aditya ECE 4th Yr (pass out batch) 52 10900316076 Rishali ECE 4th Yr (pass out batch) 53 10900316077 Reeti Chatterjee ECE 4th Yr (pass out batch) 54 10900316078 Raman Agarwal ECE 4th Yr (pass out batch) 55 10900316079 Rajorshi Roy ECE 4th Yr (pass out batch) 56 10900316080 Rahul Kumar Verma ECE 4th Yr (pass out batch) 57 10900316081 Priya Kumari ECE 4th Yr (pass out batch) 58 10900316082 Pritthish Goswami ECE 4th Yr (pass out batch) 59 10900316083 Pritam Ghosh ECE 4th Yr (pass out batch) 60 10900316084 Premkant Kumar ECE 4th Yr (pass out batch) 61 10900316085 Prem Kumar ECE 4th Yr (pass out batch) 128 Shilpa Bhattacharya ECE 4th Yr (pass out batch) 129 Seema shruti ECE 4th Yr (pass out batch) 130 Reshma Ghosh ECE 4th Yr (pass out batch) 131 anirban mukherjee ECE 4th Yr (pass out batch) 143 Wrishav Ghosh Dastidar ECE 4th Yr (pass out batch)


List of Publication of Journals Papers:
1. Priyanka Saha , Saheli Sarkhel and Subir Kumar Sarkar "Two-Dimensional Potential and Threshold Voltage Modeling of Work Function Engineered Double Gate High-k Gate Stack Schottky Barrier MOSFET", Journal of Electronic Materials, Springer, Vol.8, Issue 6, pp-3823-3832, March 2019. 2. Saheli Sarkhel, Priyanka Saha and Subir Kumar Sarkar, “Exploring the Threshold Voltage Characteristics and Short Channel Behavior of Gate Engineered Front Gate Stack MOSFET with Graded Channel”, Silicon, Springer publications, Volume 11, Issue 3, pp 1421–1428, June 2019. 3. Priyanka Saha, Saheli Sarkhel and Subir Kumar Sarkar ,“3D Modeling and Performance Analysis of Dual Material Tri Gate Tunnel Field Effect Transistor”, in IETE Technical Review, Taylor and Francis, Vol.36 Issue 2, pp-1-13,March 2018. 4. Priyanka Saha, Saheli Sarkhel and Subir Kumar Sarkar , "Compact 2D threshold voltage modeling and performance analysis of ternary metal alloy work-function-engineered double-gate MOSFET", in Journal of Computational Electronics, Springer, Vol.16.No.3,pp-648-657, June 2017. 5. Ranita Saha, Saheli Sarkhel and Subir Kumar Sarkar, "Analytical Modeling and performance characterization of a Double Gate MOSFET with Dielectric Pockets incorporating workfunction engineered binary metal alloy gate electrode for subdued SCEs", in IETE Technical Review, Taylor and Francis, Vol. 35, Issue 5, pp-506-513, 2017 . 6. Saheli Sarkhel, Navjeet Bagga and Subir Kumar Sarkar, " A compact analytical model of binary metal alloy silicon-on-nothing (BMASON) tunnel FET with interface trapped charges" in Journal of Computational Electronics, Springer, September 2017, Volume 16, Issue 3, pp 704–713. 7. Navjeet Bagga, Saheli Sarkhel and Subir Kumar Sarkar. “Exploring the asymmetric characteristics of a Double Gate MOSFET with Linearly Graded Binary Metal Alloy Gate Electrode for enhanced performance.” In IETE Journal of Research, Taylor and Francis, Volume 62, 2016 - Issue 6, Pages 786-794 , 2016. 8. Saheli Sarkhel, Navjeet Bagga and Subir Kumar Sarkar. “Compact 2D Modeling and Drain Current Performance Analysis of a Work Function Engineered Double Gate Tunnel Field Effect Transistor.” In Journal of Computational Electronics, Springer, Vol. 15, Issue 1, pp. 104-114, March 2016. 9. Saheli Sarkhel and Subir Kumar Sarkar. “A compact quasi 3D threshold voltage modeling and performance analysis of a novel linearly graded binary metal alloy quadruple gate MOSFET for subdued short channel effects.” In Superlattices and Microstructures, Elsevier, Vol. 82, pp. 293-302, 2015. 10. Saheli Sarkhel and Subir Kumar Sarkar. “A comprehensive two dimensional analytical study of a Nanoscale Linearly Graded Binary Metal Alloy Gate Cylindrical Junctionless MOSFET for improved short channel performance.” In Journal of Computational Electronics, Springer, Vol.13, pp. 925-932, 2014. 11. Saheli Sarkhel, Bibhas Manna and Subir Kumar Sarkar. “Threshold voltage modeling and performance comparison of a novel linearly graded binary metal alloy gate junctionless double gate metal oxide semiconductor field effect transistor.” In Indian Journal of Physics, Springer, Vol. 89, No.6, pp. 593–598, 2015. 12. Saheli Sarkhel, Bibhas Manna and Subir Kumar Sarkar. “A Compact Two Dimensional Analytical Modeling of Nanoscale Fully Depleted Dual Material Gate strained SOI/SON MOSFETs for subdued SCEs.” In Journal of Low Power Electronics, ASP, Volume 10, Number 3, pp. 383-391, September 2014. 13. Saheli Sarkhel, Bibhas Manna and Subir Kumar Sarkar. “Analytical Modeling and Simulation of a Linearly Graded Binary Metal Alloy Gate Nanoscale Cylindrical MOSFET for reduced short channel effects” In Journal of Computational Electronics, Springer, Vol. 13, No. 3, pp. 599-605, April, 2014. 14. Saheli Sarkhel, Bibhas Manna, P.K. Dutta and Subir Kumar Sarkar. “Analytical Model for performance comparison of a nano scale Dual Material Double Gate Silicon on Insulator (SOI) and Silicon on Nothing (SON) MOSFET.” In Journal of Nano Engineering and Nano Manufacturing, ASP, Vol.4, No. 3, pp. 182-188, 2014. 15. Bibhas Manna, Saheli Sarkhel, Ankush Ghosh, S. S. Singh and Subir Kumar Sarkar. “Dual Material Gate Nanoscale SON MOSFET: For Better Performance.” In International Journal of Computer Application (IJCA), ISBN: 973-93-80875-27-15, 2013. 16. Bibhas Manna, Saheli Sarkhel, N. Islam, S. Sarkar and Subir Kumar Sarkar. “Spatial Composition Grading of Binary Metal Alloy Gate Electrode for Short-Channel SOI/SON MOSFET Application.” In IEEE Transaction on Electron Devices, Vol-59, Issue-12, pp. 3280-3287, 2012. 17. Saheli Sarkhel, Sounak Naha and Subir Kumar Sarkar “Reduced SCEs in Fully Depleted Dual-Material Double-Gate (DMDG) SON MOSFET: Analytical Modeling and Simulation.” In International Journal of Scientific and Engineering Research, Volume 3, Issue 6, June 2012 Edition.


List of Publication of Conference Proceedings:
1. Saheli Sarkhel and Navjeet Bagga, “Analytical Model of a Strain Induced Lateral Channel Workfunction Engineered Surrounding Gate MOSFET”, IEEE Conference on Applied Signal Processing , ASPCON 2020, 7th – 9th October, 2020, Jadavpur University. 2. Rishov Aditya, Saheli Sarkhel and Soumya Pandit, “Comparative Study of Doublet OTA Circuit Topologies Operating in Weak Inversion Mode for Low Power Analog IC Applications”, IEEE EDS conference VLSI DCS 2020 during 21st -22nd March, 2020 at Meghnad Saha Institute of Technology, Kolkata. 3. Saheli Sarkhel, Priyanka Saha, Pritha Banerjee and Subir Kumar Sarkar, " Two dimensional analytical modeling based threshold voltage characteristics of proposed linearly graded work function engineered gate all around SB MOSFET", IEEE International Conference on Computing, Power And Communication Technologies 2018 (GUCON) organized by Galgotias University, Noida on September 28-29, 2018. 4. Priyanka Saha, Saheli Sarkhel, Dinesh Kumar Dash, Suvam Senapati and Subir Kumar Sarkar, "Analytical Modeling and Simulation of Triple Metal Front Gate Stack DG- MOSFET with Graded channel (GC-TMDG MOSFET)", Springer International Conference on Communication Devices and Networking (ICCDN) 2017, Sikkim Manipal Institute of Technology, Sikkim from 3rd to 4th June, 2017. (Best Paper Awarded) 5. Saheli Sarkhel, Priyanka Saha and Subir Kumar Sarkar, "Parasitic Fringe Capacitance Modeling of Work Function Engineered Double Gate TFET", in the 2nd IEEE International Conference “Devices for Integrated Circuits (DevIC 2017)”, Kalyani Government Engineering College from March 23-24, 2017. 6. Navjeet Bagga, Saheli Sarkhel and Subir Kumar Sarkar. “Analytical Model for ID-VD characteristics of a Triple Metal Double Gate TFET.” In IEEE International Conference on Computing, Communication and Automation (ICCCA 2016), 29th-30th April 2016, Noida. 7. Saheli Sarkhel, Navjeet Bagga and Subir Kumar Sarkar. “Analytical Modeling and Simulation of Work-function Engineered Gate Junctionless high-k dielectric Double Gate MOSFET: A Comparative Study.” In Michael Faraday IET International Summit-2015 (MFIIS 2015), An IET International Conference 12th -13th September, 2015, Kolkata. 8. Navjeet Bagga, Saheli Sarkhel and Subir Kumar Sarkar. “Recent Research Trends in Gate Engineered Tunnel FET for Improved Current Behaviour by subduing the Ambipolar Effects: A Review.” In IEEE International Conference on Computing, Communication and Automation (ICCCA2015) 15th -16th May 2015, Noida. 9. Saheli Sarkhel, Bibhas Manna and Subir Kumar Sarkar. “A Compact Capacitive Approach based Threshold Voltage Modeling and Performance Comparison of a novel UBR MOSFET with SOI MOSFET.” In 2nd International Conference on Devices, Circuits and Systems (ICDCS 2014), IEEE Conference, 6-8 March, 2014, Coimbatore. 10. Kousik Naskar, Anindya Jana, Saheli Sarkhel, Bibhas Manna and Subir Kumar Sarkar. “Study of power dissipation and delay of two dimensional SOI-SON based MOSFET inverter.” In 2013 Annual International Conference on Emerging Research Areas and 2013 International Conference on Microelectronics, Communications and Renewable Energy (AICERA/ICMiCR), IEEE Conference, June 4-6, 2013, Kerala. 11. Anindya Jana, Kousik Naskar, Saheli Sarkhel, Bibhas Manna, J.K. Singh and Subir Kumar Sarkar. “Realization of Gate performance of OR gate using hybrid Pass transistor based logic circuit.” In 2013 Annual International Conference on Emerging Research Areas and 2013 International Conference on Microelectronics, Communications and Renewable Energy (AICERA/ICMiCR), IEEE Conference, June 4-6, 2013.Kerala. 12. Saheli Sarkhel, Bibhas Manna, Anindya Jana, Kousik Naskar and Subir Kumar Sarkar. “Analytical Potential Distribution Model of Symmetric Double Gate Underlap MOSFET with Binary Metal Alloy as Gate Electrode for Subdued SCEs.” In 2013 Annual International Conference on Emerging Research Areas and 2013 International Conference on Microelectronics, Communications and Renewable Energy (AICERA/ICMiCR), IEEE Conference, June 2013, Kerala. 13. Deepon Saha, Kousik Naskar, Saheli Sarkhel, Bibhas Manna and Subir Kumar Sarkar. “Device Circuit Co-Design of FD-SON MOSFET using BSIMSOI MOSFET Model.” In 2013 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT 2013), IEEE Conference, 17-19 January,2013, IISc Bangalore. 14. Tiya Dey Malakar, Bibhas Manna, Saheli Sarkhel, Sourav Naskar, P. K. Dutta and Subir Kumar Sarkar. “Small - Signal Parameter Extraction to Study the RF Performance of SOI and SON MOSFET.” In 2012 International Conference on Communications, Devices and Intelligent Systems (CODIS 2012), IEEE Conference, 28-29 December 2012, Jadavpur University, Kolkata. 15. Sounak Naha, Saheli Sarkhel and Subir Kumar Sarkar. “A Two Dimensional Analytical Modeling of Fully Depleted Dual Material Gate SON MOSFET and Evidence for Suppressed SCEs.” In 1st International Conference on Devices, Circuits and Systems (ICDCS 2012), IEEE Conference, March 15-16, 2012, Karunya University, Coimbatore.
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